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Processor platform variants diagram
Processor platform variants
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Processor Platform Technology


The digital revolution continues to invent new solutions and redefine existing products. It consolidates services and functionality, generating new usage models and market opportunities whilst continuing to meet the deflationary pricing expectations of the end-user.

At the core of our processor platform is our processor architecture an optimized multi-threaded array processor, an MTAP. Within each MTAP there are a multitude of parallel processing elements ( PEs ). Each PE is a processor in its own right. Connecting the MTAP to other MTAP cores, to interface units and specialized application data engines is the high bandwidth Network-on-Chip.

Within ClearSpeed’s platform technology, the functional configuration of a PE, an MTAP, the peripheral units and on-chip network is configurable to target a specific market. Within the structural framework of the platform, not just one, but a number of variants can be implemented, efficiently delivering silicon IP, verification, modelling, and software automation.

ClearSpeed have successfully demonstrated the platform’s capabilities through the development and launch of three generations of massively parallel processor. For example the CSX600 and CSX700 processors were designed, within the platform, to target the massive 64bit floating point requirements of High Performance Computing (HPC), Financial and signal processing markets.

A range of exciting, emerging markets require close-to-the-sensor massive data processing whilst retaining the ability to make product updates and remain within a low power, reliable, envelope.

Combined, the platform advantage and leading edge silicon process expertise (from 130nm to 45nm and  beyond), allows ClearSpeed to deliver tailored, massively parallel, performance at low power into customer systems and applications.