Bristol, UK – October 9, 2006 - ClearSpeed Technology (LSE:CSD), the leader in floating point coprocessor acceleration technology for high performance and technical computing (HPTC), today announced that the Tokyo Institute of Technology’s TSUBAME Supercomputer achieved a ClearSpeed accelerated 47.38 TeraFLOPS (TFLOPS, trillion floating point operations per second) Linpack Top500 performance result that firmly establishes the metrics by which all future HPTC systems will be measured.

The Tokyo Institute of Technology (Tokyo Tech) achieved its original goal of dominantly and decisively becoming the number 1 supercomputing infrastructure in Asia in June 2006. Displacing the previous leader (the 36 TFLOPS Earth Simulator) with its 38 TFLOPS result and number 7position in the June Top500, Tokyo Tech has now revealed the true potential of its visionary architecture for TSUBAME. The new result positions Tokyo Tech at number 5 in the world according to results published on October 3 by Jack Dongarra of the University of Tennessee, who maintains the Top500 ranking.

"Our team here at Tokyo Tech worked very hard and closely with ClearSpeed to achieve an increase of over 9 TFLOPS performance from our previous result with very little addition in power requirements and no overhead in space,” said Professor Satoshi Matsuoka of the Global Scientific Information and Computing Center (GSIC) of Tokyo Institute of Technology.

“Acceleration technology is acknowledged to be the wave of the future for supercomputing and we are very happy to be the first in the world to demonstrate this as a fact by improving our position from number 7 to number 5 of the world’s Top500 sites”

The TSUBAME cluster comprises 655 Sun Microsystems X4600 servers, each with eight dual core AMD Opteron™ processors. Each server delivers almost 60 GigaFLOPS (GFLOPS) of performance, and the cluster consumes approximately 800KW of power in total. The cluster’s 360 ClearSpeed Advance™ accelerator boards each deliver 25.5 GFLOPS of performance, increasing the cluster’s overall performance by 24 percent while adding only 1 percent to the overall power consumption. An earlier benchmark using just 350 of the cluster’s systems, each equipped with one ClearSpeed Advance board delivered a result of 29.45 TFLOPS representing a performance improvement of almost 50 percent over the non-accelerated systems.

Energy costs have an extremely heavy burden on the total cost of ownership equation since the price of energy over time extends well beyond the price of the system. Using ClearSpeed’s acceleration technology coupled with standard systems and components proves that supercomputers need to be constructed without incurring outrageous increases in energy costs to achieve desired performance results.

“Coming in at number 5 with the worlds first accelerated system is a major achievement by Professor Matsuoka and his team. It is also an excellent proof point that ClearSpeed’s acceleration technology represents a new wave for meeting the intense needs of the growing HPTC market,” said Tom Beese, CEO for ClearSpeed. “With performance per watt as a critical metric for meeting supercomputing needs, these results prove beyond any doubt that using ClearSpeed’s acceleration technology has enabled TSUBAME to set a completely new standard.”