Embedded Processing
- Dual MTAP cores
- 96 GFLOPS peak (32 & 64-bit)
- 48 GMACS peak (16x16 & 32+64)
- 10 W max power consumption
- 250 MHz clock speed
- 192 Processing Elements
- 8 spare PEs for resiliency
- ECC on all internal memories
- Dual integrated 533 MHz 64-bit
DDR2 memory controllers with ECC - On-die temperature sensors
- Active power management
- Integrated PCI Express x16
- CCBR chip-to-chip bridge port
- IBM 90nm process
- 266 million transistors
The CSX architecture is engineered to solve the Size, Weight,
and Power problem in embedded computing. It provides the best performance
per watt in the industry
for digital signal processing (DSP) and other compute intensive tasks.
By integrating processing, system interfaces and on-chip memory the CSX700 brings cost, reliability and performance advantages that address leading edge embedded system requirements.
Designed for low power consumption, the CSX700 combines clock gating techniques, custom silicon design and low operating frequency. Simple clock management enables maximum application performance within defined power and thermal limits.
View the presentation from High Performance Embedded Computing 2008.
ClearSpeed is working with BAe Systems who have licensed the processor architecture to produce a radiation-hardened version for space applications. Press release.